Verification Engineer - Digital Design

engibex
Leuven, Belgium
12 days ago

Role details

Contract type
Internship / Graduate position
Employment type
Full-time (> 32 hours)
Working hours
Regular working hours
Languages
English
Experience level
Senior

Job location

Leuven, Belgium

Tech stack

Adobe InDesign
Boolean Algebra
Software Debugging
Logic Synthesis of Circuits
Electronic Design Automation
Perl
Formal Verification
Python
Regression Testing
SystemVerilog
Tcl (Programming Language)
Verilog

Job description

The mission of the business unit is to provide a broad portfolio of differentiated analog, mixed-signal, wireless, and energy management solutions that enable our customers to realize compelling green, safe, connected, and secure products for the automotive market.

Together with a worldwide design team, we develop application specific standard products which integrate high performance analog functions as well as digital logic.

For our fast-growing product line we are currently looking for a candidate for a Digital Verification position to execute the digital functional verification of our mixed-signal circuit designs in automotive platforms, IOT/Consumer and/or industrial platforms.

This candidate will work closely with verification architect/lead and other team members.

The candidate will have excellent communication skills and proven ability to collaborate across organizational and geographical boundaries.

Successful applicants will be responsible for:

  • Studying the specification of the device under test

  • Work with the verification lead in defining the digital verification planning to reach 100% functional coverage prior tapeout

  • Developing and/or running the UVM simulation environment (drivers, monitors, checkers and assertions) and bridge it with mixed signal verification

  • Developing and/or running formal verification environment

  • Developing and/or running digital and top-level simulations according to the verification plan

  • Preparing and holding design verification reviews

  • Creating and maintaining regression test suites

  • Reporting bugs, proposing solutions and following their resolution

You will work closely with analog and digital designers as well as test and validation engineers to support both pre-silicon verification and post-silicon validation.

Working in a strong technical biased environment, you will develop your competencies and will have the opportunity of evolving in both technical or project responsibilities.If you have the passion for innovation, the desire to challenge yourself and want to put your creativity in enabling the new mobility experience with electric autonomous cars, this is the right opportunity to join a leader in automotive semiconductor.

Profile / Requirements : Required

Requirements

BS/MS in EE and 5+ years of hands-on experience on digital verification methodologies (Metrics Driven Verification, Formal)

  • Good understanding of digital RTL debug

  • Knowledge of state-of-the-art EDA tools: Cadence Xcelium, Cadence Vmanager, Cadence JasperGold either through full time/internship experience, or coursework

  • Background in design and verification languages and methodologies (Verilog, SystemVerilog, UVM, SVA) through full time/internship/training or coursework.

  • Solid scripting skills (Python preferred or Perl or TCL)

  • Good communication skills (English)

Optional

  • Knowledge developing behavioral models for analog IPs (both WREAL or SV RNM)

  • Understand and debug analog schematics

  • Tools : Cadence or equivalent tools for simulation, regression, formal verification

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