Senior Engineer Digital 3rd Party IP Design System Integration iv)

Infineon
Villach, Austria
3 days ago

Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Working hours
Regular working hours
Languages
English, German
Experience level
Senior
Compensation
€ 61K

Job location

Villach, Austria

Tech stack

Computer Engineering
Electronic Design Automation
Perl
Python
Shell
SystemVerilog
Systems Integration
Verilog
Scripting (Bash/Python/Go/Ruby)

Job description

Job Id126198JobfamilieResearch & DevelopmentBeschäftigungsartVollzeitVertragsdauerBefristetEinsteigen alsBerufserfahrene*r (inkl. Management Positionen)#WeAreIn for jobs that impact everyone's life. What if your ideas could change the way the world connects, powers up, or thinks? As a Senior Engineer Digital 3rd Party IP Design System Integration in our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in? Are you in?, As Senior Engineer in the Development Center Villach, you will have the chance to work on cutting-edge technologies, gain hands-on experience, and develop your skills in a dynamic, multicultural environment.

  • Get experience with externally developed digital integrated circuits
  • Get experience with state-of-the-art design preparation and design system integration techniques
  • Contribute to the automation enhancements of the 3rd Party IP design system integration flow
  • Get hands-on experience with verifying design data quality
  • Get familiar with the Infineon chip development flow and the 3rd Party IP Lifecycle
  • Utilize design tools including Synthesis, Lint, CDC, RDC, and STA, We are filling this position through one of our leasing partners. A valid work permit for Austria (RWR+ Card) or EU citizenship is a prerequisite for this position. This position is subject to the collective agreement for workers and employees of EEI with a minimum salary of € 4.341,85 ( https://www.feei.at/wp-content/uploads/2024/04/minimum-salaries-white-collar-workers-2025.pdf). The monthly salary is paid 14 times p.a. A higher payment is negotiable depending on your expertise and skills. Apply to this position online by following the URL and entering the Job ID in our job search.https://www.infineon.com/jobs Angaben des Unternehmens gemäß Gleichbehandlungsgesetz: Das Mindestentgelt für die Stelle als Senior Engineer Digital 3rd Party IP Design System Integration (f/m/div) beträgt 4.341,85 EUR brutto pro Monat auf Basis Vollzeitbeschäftigung. Bereitschaft zur Überzahlung.

Requirements

We are looking for someone eager to join our motivated international team. We want to hear from you if you possess excellent interpersonal and communicational skills and a pragmatic and strong problem-solving approach to daily work.

  • A Degree in Electronics, Computer Engineering or similar
  • Experience in Digital IC design
  • Knowledge of Verilog and System Verilog
  • Experience in RTL and UPF design, as well as with EDA tools for Synthesis, Lint, CDC, STA
  • Know-how of UNIX / Linux
  • Familiarity with scripting with Python, Perl, UNIX Shell
  • Fluency in English (German language skills are an advantage)

About the company

We make life easier, safer and greener, with technology that achieves more, consumes less and is accessible to everyone. Microelectronics from Infineon is the key to a better future. Efficient use of energy, environmentally-friendly mobility and security in a connected world we solve some of the most critical challenges that our society faces while taking a conscientious approach to the use of natural resources. 2 Senior Engineer Digital 3rd Party IP Design System Integration (f/m/div)

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